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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This file contains the example using Xilfpga library to transfer the user provided Bitstream into zynqmp pl region. </p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who     Date     Changes
</p>
<hr/>
<p>
1.0   Nava    06/08/16  First release
4.0   Nava       02/21/18  Updated the example relevant to src code changes.
4.2   Nava    05/30/18  Refactor the xilfpga library to support
                        different PL programming Interfaces.
4.2      adk     08/23/18  Added bitstream size define.
5.0   Nava       02/06/19  Updated the example to sync with 5.0 version API's
5.0      Nava    03/16/19  Typical bitstram size of zcu102 board is 26MB.So
                   updated the bitstream size macro value for the same.
5.2   Nava       02/14/20  Removed unwanted header file inclusion.
5.3   Nava    06/16/20  Modified the date format from dd/mm to mm/dd.
5.3   Nava    06/16/20  Added support for Versal Platform.
6.0   Nava    12/14/20  In XFpga_PL_BitStream_Load() API the argument
                        AddrPtr_Size is being used for multiple purposes.
                        Use of the same variable for multiple purposes can
                        make it more difficult for a person to read (or)
                        understand the code and also it leads to a safety
                        violation. fixes this  issue by adding a separate
                        function arguments to read KeyAddr and
                        Size(Bitstream size).
6.1   Nava    09/13/21  Fixed compilation warning.</pre><pre></pre> </div></div><!-- contents -->
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